<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>C21 Blog</title><link>https://blog.c21-mac.com/</link><description>Recent content on C21 Blog</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Mon, 30 Mar 2026 00:00:01 +0530</lastBuildDate><atom:link href="https://blog.c21-mac.com/index.xml" rel="self" type="application/rss+xml"/><item><title>Optimizing a Lock-Free SPSC Queue</title><link>https://blog.c21-mac.com/posts/spsc/</link><pubDate>Mon, 30 Mar 2026 00:00:01 +0530</pubDate><guid>https://blog.c21-mac.com/posts/spsc/</guid><description>&lt;p&gt;Yet another SPSC blog! The goal isn&amp;rsquo;t just to explain a final solution, such as the &lt;strong&gt;lock-free, index-cached implementation&lt;/strong&gt; some of you might already know. Instead, I want to walk through the iterative process: testing different approaches, analyzing the results, and determining how to squeeze out performance.&lt;/p&gt;
&lt;p&gt;By walking through the analysis, I hope this process provides a template for tackling similar performance challenges in the future.&lt;/p&gt;
&lt;p&gt;The optimization discussions are focused on the &lt;strong&gt;x86 architecture&lt;/strong&gt;. All measurements were taken on an &lt;strong&gt;AMD Ryzen 7 6800HS&lt;/strong&gt; using &lt;strong&gt;gcc 13.3.0&lt;/strong&gt;. This CPU has a single &lt;strong&gt;CCX (Core Complex)&lt;/strong&gt;, and the benchmarks use cores 0 and 2 - two distinct physical cores, rather than hyperthreaded siblings.&lt;/p&gt;</description></item></channel></rss>